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polyphase energy metering ic with pulse output ade7752/ade7752a features high accuracy, supports 50 hz/60 hz iec62053-2x less than 0.1% error over a dynamic range of 500 to 1 compatible with 3-phase/3-wire delta and 3-phase/4-wire w ye configurations the ade7752 supplies average real power on frequency outputs f1 an d f2 high frequency output cf is intended for calibration and sup plies instantaneous real power logic output revp indicates a potential miswiring or nega tive power for each phase direct drive for electromechanical counters and 2-phase st epper motors (f1 and f2) proprietary adcs and dsp provide high accuracy over large v ariations in environmental conditions and time on-chip power supply monitoring on-chip creep protection (no load threshold) on-chip reference 2.4 v 8% (20 ppm/c typical) with e xternal overdrive capability single 5 v supply, low power 60 mw t ypical: ade7752 30 mw typical: ade7752a low cost cmos process general description the ade7752 is a high accuracy polyphase electrical energy measurement ic. the ade7752a is a pin-to-pin compatible low power version of ade7752. the functions of ade7752 and ade7752a are the same. both products are referred to in the text of this data sheet as ade7752. the part specifications surpass the accuracy requirements as q uoted in the iec62053-2x standard. the only analog circuitry used in the ade7752 is in the analog-to-digital converters (adcs) and reference circuit. all other signal processing (such as multi- plication, filtering, and summation) is carried out in the digital domain. this approach provides superior stability and accuracy over extremes in environmental conditions and over time. the ade7752 supplies average real power information on the lo w frequency outputs, f1 and f2. these logic outputs may be used to directly drive an electromechanical counter or to interface with an mcu. the cf logic output gives instanta- neous real power information. this output is intended to be used for calibration purposes. the ade7752 includes a power supply monitoring circuit on th e v dd pin. the ade7752 remains inactive until the supply voltage on v dd reaches 4 v. if the supply falls below 4 v, no pulses are issued on f1, f2, and cf. internal phase matching circuitry ensures that the voltage and current channels are phase matched. an internal no load threshold ensures the part does not exhibit any creep when there is no load. the ade7752 is available in a 24-lead soic package. functional block diagram 7 8 15 10 14 13 5 6 16 9 lpf hpf 3 clkout clkin dgnd cf s1 f1f2 s0 scf revp digital-to-frequency converter 2.4v ref ref in/out agnd 4k ibp ibn vbp vn icp icn vcp iap ian va p adc adc adc adc v dd ade7752/ ade7752a power supply monitor adc adc phase correction phase correction phase correction 11 12 4 18 21 22 23 24 1 20 19 2 17 hpf hpf lpf lpf abs x x x 02676-a-001 figure 1. 24-lead standard small outline package [soic] rev. c information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. t el: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2005 analog devices, inc. all rights reserved.
ade7752/ade7752a rev. c | page 2 of 24 table of contents specifications ..................................................................................... 3 timing characteristics ..................................................................... 4 absolute maximum ratings ............................................................ 5 esd caution .................................................................................. 5 pin configuration and function descriptions ............................. 6 typical performance characteristics ............................................. 8 test circ u it ...................................................................................... 10 ter mi nolo g y .................................................................................... 11 theory of operation ...................................................................... 12 power factor considerations .................................................... 12 nonsinusoidal voltage and current ........................................ 13 analog inputs .................................................................................. 14 current channels ....................................................................... 14 voltage channels ........................................................................ 14 typical connection diagrams ...................................................... 15 current channel connection ................................................... 15 voltage channels connection .................................................. 15 meter connections ..................................................................... 15 power supply monitor ................................................................... 17 hpf and offset effects .............................................................. 17 digital-to-frequency conversion ................................................ 18 mode selection of the sum of the three active energies ..... 19 power measurement considerations ....................................... 19 transfer function ........................................................................... 20 frequency outputs f1 and f2 .................................................. 20 frequency output cf ................................................................ 21 selecting a frequency for an energy meter application ........... 22 frequency outputs ..................................................................... 22 no load threshold .................................................................... 22 negative power information ..................................................... 23 outline dimensions ....................................................................... 24 ordering guide .......................................................................... 24 revision history 7/05rev. b to rev. c added ade7752a.............................................................. universal changed negp pin name to revp................................ universal changes to table 1.............................................................................3 changes to table 6, table 7 ............................................................21 changes to table 8, table 9, table 10............................................22 updated outline dimensions ........................................................24 changes to ordering guide ...........................................................24 9/03rev. a to rev. b updated format.................................................................. universal change to figure 19 ........................................................................15 5/03rev. 0 to rev. a changed f 1C5 to f 1C7 ............................................................ universal change to figure 6 ..........................................................................10 changes to frequency outputs f1 and f2 section .....................13 replaced table ii .............................................................................13 changes to examples 1, 2, and 3 ...................................................14 replaced table iii............................................................................14 replaced tables iv, v, and vi ........................................................15 changes to selecting a frequency for an energy meter application section...................................................15 changes to no load threshold section............................16 replaced table vii ..........................................................................16
ade7752/ade7752a rev. c | page 3 of 24 specifications v dd = 5 v 5%, agnd = dgnd = 0 v, on-chip reference, clkin = 10 mhz, t min to t max = C40c to +85c, unless otherwise noted. table 1. ade7752 ade7752a parameter min typ max min typ max unit conditions accuracy 1 , 2 measurement error on current channel 0.1 0.1 % reading voltage channel with full-scale signal (500 mv), 25c, over a dynamic range of 500 to 1 phase error between channels pf = 0.8 capacitive 0.1 0.1 degrees pf = 0.5 inductive 0.1 0.1 degrees ac power supply rejection scf = 0; s0 = s1 = 1 output frequency variation (cf) 0.01 0.01 % reading ia = ib = ic = 100 mv rms, va = vb = vc = 100 mv rms, @ 50 hz, ripple on v dd of 175 mv rms @ 100 hz dc power supply rejection s1 = 1; s0 = scf = 0 output frequency variation (cf) 0.1 0.1 % reading ia = ib = ic = 100 mv rms, va = vb = vc = 100 mv rms, v dd = 5 v 250 mv analog inputs see the analog inputs section. maximum signal levels 0.5 0.5 vpeak differential v ap to v n , v bp to v n , v cp to v n , i ap to i an , i bp to i bn , i cp to i cn input impedance (dc) 370 410 370 450 k clkin = 10 mhz bandwidth (C3 db) 14 14 khz clkin/256, clkin = 10 mhz adc offset error 1 , 2 25 25 mv gain error 9 9 % ideal external 2.5 v reference, ia = ib = ic = 500 mv dc reference input ref in/out input voltage range 2.6 2.6 v 2.4 v + 8% 2.2 2.2 v 2.4 v C 8% input impedance 3.3 3.3 k input capacitance 10 10 pf on-chip reference nominal 2.4 v reference error 200 200 mv temperature coefficient 25 25 ppm/c clkin all specifications for clkin of 10 mhz input clock frequency 10 10 mhz logic inputs 3 acf, s0, s1, and abs input high voltage, v inh 2.4 2.4 v v dd = 5 v 5% input low voltage, v inl 0.8 0.8 v v dd = 5 v 5% input current, i in 3 3 a typically 10 na, v in = 0 v to v dd input capacitance, c in 10 10 pf logic outputs 3 f1 and f2 output high voltage, v oh 4.5 4.5 v i source = 10 ma, v dd = 5 v output low voltage, v ol 0.5 0.5 v i sink = 10 ma, v dd = 5 v cf and revp output high voltage, v oh 4 4 v v dd = 5 v, i source = 5 ma output low voltage, v ol 0.5 0.5 v v dd = 5 v, i sink = 5 ma power supply for specified performance v dd 4.75 5.25 4.75 5.25 v 5 v 5% i dd 12 16 6 9 ma 1 see the terminology section for explanation of specifications. 2 see the plots in the typical performance characteristics section. 3 sample tested during initial releas e and after any redesign or process change that may affect this parameter.
ade7752/ade7752a rev. c | page 4 of 24 timing characteristics v dd = 5 v 5%, agnd = dgnd = 0 v, on-chip reference, clkin = 10 mhz, t min to t = C40c to +85c, unless otherwise noted . 1 , 2 max table 2. parameter conditions spec unit t f1 and f2 pulse width (logic high). 275 ms 1 3 t output pulse period. see the transfer function section. see table 6 . sec 2 t time between f1 falling edge and f2 falling edge. 1/2 t 3 2 sec t cf pulse width (logic high). 96 ms 4 3 , 4 t cf pulse period. see the transfer function and the frequency outputs sections. see table 7 . sec 5 5 t minimum time between the f1 and f2 pulse. clkin/4 sec 6 1 sample tested during initial releas e and after any redesign or process change that may affect this parameter. 2 see figure 2. 3 the pulse widths of f1, f2, and cf ar e not fixed for higher output frequencies. see the frequency outputs section. 4 cf is not synchronous to f1 or f2 frequency outputs. 5 the cf pulse is always 1 s in the high frequency mode. f1 f2 cf t 1 t 6 t 2 t 3 t 4 t 5 02676-a-002 e 2 m aam ee p
ade7752/ade7752a rev. c | page 5 of 24 absolute maximum ratings t = 25c, unless otherwise noted. a table 3. parameter rating stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v to agnd ?0.3 v to +7 v dd v to dgnd ?0.3 v to +7 v dd analog input voltage to agnd vap, vbp, vcp, vn, iap, ian, ibp, ibn, icp, and icn ?6 v to +6 v reference input voltage to agnd ?0.3 v to v + 0.3 v dd digital input voltage to dgnd ?0.3 v to v + 0.3 v dd digital output voltage to dgnd ?0.3 v to v + 0.3 v dd operating temperature range ?40c to +85c industrial storage temperature range ?65c to +150c junction temperature 150c 24-lead soic, power dissipation 88 mw ja thermal impedance 250c/w lead temperature, soldering vapor phase (60 sec) 215c infrared (15 sec) 220c esd caution esd (electrostatic discharge) sensiti ve device. electrostatic charges as hi gh as 4000 v readily accumulate on the human body and test equipment and can discharge wi thout detection. although this product features proprietary esd protection circuitry, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality.
ade7752/ade7752a rev. c | page 6 of 24 pin configuration and function descriptions top view (not to scale) ade7752/ ade7752a ref in/out agnd icn icp ibn cf dgnd v dd revp ibp ian iap vn vcp vbp vap abs s0 f2 s1 f1 scf clkin clkout 2 3 4 5 6 7 8 9 10 11 12 1 24 23 22 21 20 19 18 17 16 15 14 13 02676-a-003 figure 3. pin configuration table 4. pin function descriptions pin no. mnemonic description 1 cf calibration frequency logic output. the cf logic output gives instantaneous re al power information. this output is intended to be used for calibration purposes. see the scf pin description. 2 dgnd this provides the ground reference for the digita l circuitry in the ade7752: the multiplier, filters, and digital-to-frequency converter. because the digital return currents in the ade7752 are small, it is acceptable to connect this pin to the an alog ground plane of the whole system. 3 v dd power supply. this pin provides the supply voltage for the digital circuitry in the ade7752. the supply voltage should be maintained at 5 v 5% for spec ified operation. this pin should be decoupled to dgnd with a 10 f capacitor in para llel with a 100 nf ceramic capacitor. 4 revp this logic output goes logic hi gh when negative power is detected on any of the three phase inputs, that is, when the phase angle between the voltage an d the current signals is greater than 90. this output is not latched and is reset when positive power is once again detected. see the negative power information section. 5, 6; 7, 8; 9, 10 iap, ian; ibp, ibn; icp, icn analog inputs for current channel. this channel is intended for use wi th the current transducer and is referenced in this document as the current channel. these inputs are fully differential voltage inputs with maximum differential input signal levels of 0.5 v. see the analog inputs section. both inputs have internal esd protection circuitry. in addition, an overvoltage of 6 v can be sustained on these inputs without risk of permanent damage. 11 agnd this pin provides the ground reference for the analog circuitry in the ad e7752: the adcs, temperature sensor, and reference. this pin should be tied to the analog ground plane or the quietest ground reference in the system. this quiet ground reference should be used for all analog circuitry, such as antialiasing filters, current and voltage transducer s, and so on. to keep ground noise around the ade7752 to a minimum, the quiet ground plane should connect to the digital ground plane at only one point. it is acceptable to place the en tire device on the analog ground plane. 12 ref in/out this pin provides access to the on-chip voltage reference. the on-chip reference has a nominal value of 2.4 v 8% and a typical temperature coefficient of 20 ppm/c. an extern al reference source may also be connected at this pin. in either case, this pin should be decoupled to agnd with a 1 f ceramic capacitor. 13C16 vn, vcp, vbp, vap analog inputs for the voltage channe l. this channel is intended for us e with the voltage transducer and is referenced in this document as the voltage channel. these inputs are single-ended voltage inputs with a maximum signal level of 0.5 v with respect to vn for specified operation. all inputs have internal esd protection circuitry. in addition, an overvoltage of 6 v can be sustained on thes e inputs without risk of permanent damage. 17 abs this logic input is used to select the way the three active energies from the three phases are summed. this offers the designer the capability to do the arithmetical sum of the three energies ( abs logic high) or the sum of the absolute values ( abs logic low). see the mode selection of the sum of the three active energies section. 18 scf select calibration frequency. this logic input is us ed to select the frequency on the calibration output cf. table 7 shows how the calibration frequencies are selected.
ade7752/ade7752a rev. c | page 7 of 24 pin no. mnemonic description 19 clkin master clock for adcs and digita l signal processing. an external clock can be provided at this logic input. alternatively, a parallel resonant at crystal can be connected acro ss clkin and clkout to provide a clock source for the ade7752. the clock frequency for specified operation is 10 mhz. ceramic load capacitors between 22 pf and 33 pf should be used with the gate oscillator circ uit. refer to the crystal manufacturers data sheet for load capacitance requirements. 20 clkout a crystal can be connected across this pin and clkin as described previously to provide a clock source for the ade7752. the clkout pin can drive one cmos load when an external clock is supplied at clkin or when a crystal is being used. 21, 22 s0, s1 these logic inputs are used to select one of four possible frequencies for the digital-to-frequency conver- sion. this offers the designer greater flexibility when desi gning the energy meter. see the selecting a frequency for an energy meter application section. 24, 23 f1, f2 low frequency logic outputs. f1 and f2 supply average real power information. the logic outputs can be used to drive electromechanical counters and two-phase stepper motors directly. see the transfer function section.
ade7752/ade7752a rev. c | page 8 of 24 typical performance characteristics 100 10 current channel (% of full scale) 0.5 ?0.1 ?0.5 0.1 1 0.4 0 ?0.2 ?0.4 0.2 0.1 ?0.3 0.3 error (% of reading) wye connection on-chip reference phase c phase b phase a + b + c p h a s e a 02676-a-004 100 10 1.0 ?0.2 ?1.0 0.1 1 0.8 0 ?0.4 ?0.8 0.4 0.2 ?0.6 0.6 wye connection on-chip reference +25 c pf = 1 +85 c pf = 1 ? 4 0 c p f = 1 current channel (% of full scale) error (% of reading) 02676-a-007 figure 4. error as a percent of reading with internal reference (wye connection) figure 7. error as a percent of reading over temperature with internal reference (wye connection) 100 10 1.0 ?0.2 ?1.0 0.1 1 0.8 0 ?0.4 ?0.8 0.4 0.2 ?0.6 0.6 wye connection on-chip reference +25 c pf = ?0.5 + 2 5 c p f = + 1 +85 c pf = +0.5 current channel (% of full scale) error (% of reading) 02676-a-005 ? 4 0 c p f = + 0 .5 100 10 0.5 ?0.1 ?0.5 0.1 1 0.4 0 ?0.2 ?0.4 0.2 0.1 ?0.3 0.3 delta connection on-chip reference pf = +1 pf = ?0.5 p f = + 0 .5 current channel (% of full scale) error (% of reading) 02676-a-008 figure 5. error as a percent of reading over power factor with internal reference (wye connection) figure 8. error as a percent of reading over power factor with internal referenc e (delta connection) 100 10 current channel (% of full scale) 0.5 ?0.1 ?0.5 0.1 1 0.4 0 ?0.2 ?0.4 0.2 0.1 ?0.3 0.3 error (% of reading) wye connection external reference +25 c pf = ?0.5 + 2 5 c p f = + 1 ? 4 0 c p f = + 0 .5 +85 c pf = +0.5 02676-a-006 100 10 0.5 ?0.1 0.1 1 0.4 0 ?0.2 ?0.4 ?0.5 0.2 0.1 ?0.3 0.3 wye connection external reference + 2 5 c p f = 1 ? 4 0 c p f = 1 +85 c pf = 1 current channel (% of full scale) error (% of reading) 02676-a-009 figure 6. error as a percent of reading over power factor with external reference (wye connection) figure 9. error as a percent of reading over temperature with external reference (wye connection)
ade7752/ade7752a rev. c | page 9 of 24 2015105 ?5 0 ch_i pha offset (mv) 18 9 0 ?20 ?10 ?15 12 6 3 15 n: 88 mean: 4.48045 sd: 3.23101 min: ?2.47468 max: 12.9385 range: 15.4132 02676-a-012 60 65 55 50 frequency (hz) 0.5 ?0.1 ?0.5 45 0.4 0 ?0.2 ?0.4 0.2 0.1 ?0.3 0.3 p f = 0 .5 pf = 1 wye connection on-chip reference error (% of reading) 02676-a-010 figure 12. channel 1 offset distribution figure 10. error as a percent of reading over frequency with an internal reference (wye connection) 100 10 0.5 ?0.1 ?0.5 0.1 1 0.4 0 ?0.2 ?0.4 0.2 0.1 ?0.3 0.3 current channel (% of full scale) error (% of reading) wye connection on-chip reference 5 v 5 .2 5 v 4.75v 02676-a-013 100 10 0.5 ?0.1 ?0.5 0.1 1 0.4 0 ?0.2 ?0.4 0.2 0.1 ?0.3 0.3 wye connection external reference 5 v 5 .2 5 v 4.75v current channel (% of full scale) error (% of reading) 02676-a-011 figure 13. error as a percent of reading over power supply with internal reference (wye connection) figure 11. error as a percent of reading over power supply with external reference (wye connection)
ade7752/ade7752a rev. c | page 10 of 24 test circuit v dd abs ref in/out 33nf 100nf 33nf 1k 1k 825 1k 10 f v dd vn agnd dgnd f1 3 17 f2 cf clkout clkin s0 s1 scf 10mhz 22pf 22pf ps2501-1 k7 k8 ade7752/ ade7752a v dd 1 24 23 to freq. counter 20 iap ian ibp ibn icp icn rb same as iap, ian same as iap, ian not connected same as vap revp 100nf 10 f vap vbp vcp 33nf 1k 1m 2 20v 33nf 1k same as vap 5 6 7 8 9 10 16 15 14 13 11 4 12 18 22 21 19 2 i load 02676-a-014 figure 14. test circuit for performance curves
ade7752/ade7752a rev. c | page 11 of 24 terminology measurement error the error associated with the energy measurement made by the ade7752 is defined by the following formula: adc offset error this refers to the dc offset associated with the analog inputs to the adcs. it means that with the analog inputs connected to agnd, the adcs still see an analog input signal offset. however, because the hpf is always present, the offset is removed from the current channel, and the power calculation is not affected by this offset. % energytrue energytrueCade by registered energy error percentage 100 7752 ? ? ? ? ? ? = error between channels the high-pass filter (hpf) in the current channel has a phase lead response. to offset this phase response and equalize the phase response between channels, a phase correction network is also placed in the current channel. the phase correction net- work ensures a phase match between the current channels and voltage channels to within 0.1 over a range of 45 hz to 65 hz and 0.2 over a range of 40 hz to 1 khz. see gain error the gain error of the ade7752 is defined as the difference between the measured output frequency (minus the offset) and the ideal output frequency. the difference is expressed as a percentage of the ideal frequency. the ideal frequency is obtained from the ade7752 transfer function. see the transfer function figure 24 and section. figure 26 . power supply rejection (psr) this quantifies the ade7752 measurement error as a percentage of reading when the power supplies are varied. for the ac psr measurement, a reading at a nominal supply (5 v) is taken. a 200 mv rms/100 hz signal is then introduced onto the supply and a second reading is obtained under the same input signal levels. any error introduced is expressed as a percentage of reading. see definition for measurement error. for the dc psr measurement, a reading at nominal supplies (5 v) is taken. the supply is then varied 5% and a second reading is obtained with the same input signal levels. any error introduced is again expressed as a percentage of reading.
ade7752/ade7752a rev. c | page 12 of 24 theory of operation the six voltage signals from the current and voltage transducers are digitized with adcs. these adcs are 16-bit second-order - with an oversampling rate of 833 khz. this analog input structure greatly simplifies transducer interface by providing a wide dynamic range for direct connection to the transducer and also by simplifying the antialiasing filter design. a high-pass filter in the current channel removes the dc component from the current signal. this eliminates any inaccuracies in the real power calculation due to offsets in the voltage or current signals. see the the low frequency output of the ade7752 is generated by accumulating the total real power information. this low frequency inherently means a long accumulation time between output pulses. the output frequency is therefore proportional to the average real power. this average real power information can, in turn, be accumulated (by a counter, for example) to generate real energy information. because of its high output frequency and therefore shorter integration time, the cf output is proportional to the instantaneous real power. this pulse is useful for system calibration purposes that would take place under steady load conditions. hpf and offset effects section. the real power calculation is derived from the instantaneous power signal. the instantaneous power signal is generated by a direct multiplication of the current and voltage signals of each phase. in order to extract the real power component (the dc component), the instantaneous power signal is low-pass filtered on each phase. power factor considerations low-pass filtering, the method used to extract the real power information from the individual instantaneous power signal, is still valid when the voltage and current signals of each phase are not in phase. figure 15 illustrates the instantaneous real power signal and shows how the real power information can be extracted by low-pass filtering the instantaneous power signal. this method is used to extract the real power information on each phase of the polyphase system. the total real power information is then obtained by adding the individual phase real power. this scheme correctly calculates real power for nonsinusoidal current and voltage waveforms at all power factors. all signal processing is carried out in the digital domain for superior stability over temperature and time. figure 16 displays the unity power factor condition and a dpf (displacement power factor) = 0.5, or current signal lagging the voltage by 60, for one phase of the polyphase. assuming that the voltage and current waveforms are sinusoidal, the real power component of the instantaneous power signal, or the dc term, is given by () ? ? ? ? ? ? 60cos 2 1 v time iap ian va p hpf lpf ibp ibn vbp icp icn vcp vn digital-to- frequency digital-to- frequency f1 f2 cf instantaneous real power signal instantaneous power signal - p(t) instantaneous total power signal va ia + vb ib + vc ic 2 abs |x| lpf lpf |x| |x| p(t) = i(t) v(t) where: v i 2 {1+ cos (2 t)} v(t) = v cos ( t) i(t) = i cos ( t) p(t) = v i 2 v i v i 2 multiplier multiplier multiplier hpf hpf adc adc adc adc adc adc 02676-a-015 e 1 al e l aam
ade7752/ade7752a rev. c | page 13 of 24 this is the correct real power calculation. () ( n n n o tniv iti sin 2 0 += = ) (2) instantaneous real power signal instantaneous power signal v i 2 cos(60 ) v i 2 instantaneous power signal instantaneous real power signal 60 current current voltage 0v 0v vo lta g e 02676-a-016 where: i ( t ) is the instantaneous current. i o is the dc component. i n is the rms value of current harmonic n. is the phase angle of the current harmonic. n using equations 1 and 2, the real power, p , can be expressed in terms of its fundamental real power ( p 1 ) and harmonic real power ( p h ). + p p = p 1 h where: 111 1111 | i v p ?= = cos (3) figure 16. dc component of instantaneous power signal conveys real power information pf < 1 nn nn n n h |n ivp ?= = = cos 1 (4) nonsinusoidal voltage and current the real power calculation method also holds true for nonsin- usoidal current and voltage waveforms. all voltage and current waveforms in practical applications have some harmonic content. using the fourier transform, instantaneous voltage and current waveforms can be expressed in terms of their harmonic content: () ( n n n o tnv vtv ++= = sin 2 0 ) (1) as can be seen from equation 4, a harmonic real power compo- nent is generated for every harmonic, provided that harmonic is present in both the voltage and current waveforms. the power factor calculation has been shown to be accurate in the case of a pure sinusoid. therefore, the harmonic real power must also correctly account for power factor since it is made up of a series of pure sinusoids. note that the input bandwidth of the analog inputs is 14 khz with a master clock frequency of 10 mhz. where: v ( t ) is the instantaneous voltage. v o is the average value. v n is the rms value of voltage harmonic n. n is the phase angle of the voltage harmonic.
ade7752/ade7752a rev. c | page 14 of 24 analog inputs current channels voltage channels the voltage outputs from the current transducers are connected to the ade7752 current channels, which are fully differential voltage inputs. iap, ibp, and icp are the positive inputs for ian, ibn, and icn, respectively. the output of the line voltage transducer is connected to the ade7752 at this analog input. voltage channels are a pseudo- differential voltage input. vap, vbp, and vcp are the positive inputs with respect to vn. the maximum peak differential signal on the current channel should be less than 500 mv (353 mv rms for a pure sinusoidal signal) for the specified operation. the maximum peak differential signal on the voltage channel is 500 mv (353 mv rms for a pure sinusoidal signal) for specified operation. figure 17 illustrates the maximum signal levels on iap and ian. the maximum differential voltage between iap and ian is 500 mv. the differential voltage signal on the inputs must be referenced to a common mode, such as agnd. the maxi- mum common-mode signal shown in figure 18 illustrates the maximum signal levels that can be connected to the voltage channels of the ade7752. voltage channels must be driven from a common-mode voltage. in other words, the differential voltage signal on the input must be referenced to a common mode (usually agnd). the analog inputs of the ade7752 can be driven with common-mode voltages of up to 25 mv with respect to agnd. however, best results are achieved using a common mode equal to agnd. figure 17 is 25 mv. differential input 500mv max peak +500mv agnd v cm ia iap v cm ?500mv common-mode 25mv max ian iap?ian 02676-a-017 differential input 500mv max peak +500mv agnd vcm va va p v cm ?500mv common-mode 25mv max vn va p ? v n 02676-a-018 figure 17. maximum signal levels, current channel figure 18. maximum signal levels, voltage channel
ade7752/ade7752a rev. c | page 15 of 24 typical connection diagrams current channel connection meter connections figure 19 shows a typical connection diagram for the current channel (ia). a current transformer (ct) is the current trans- ducer selected for this example. notice the common-mode voltage for the current channel is agnd and is derived by center tapping the burden resistor to agnd. this provides the complementary analog input signals for iap and ian. the ct turns ratio and burden resistor rb are selected to give a peak differential voltage of 500 mv at maximum load. in 3-phase service, two main power distribution services exist: 3-phase 4-wire or 3-phase 3-wire. the additional wire in the 3-phase 4-wire arrangement is the neutral wire. the voltage lines have a phase difference of 120 (2/3 radians) between each other. see equation 5. () () () () ? ? ? ? ? ? += ? ? ? ? ? ? += = 3 4 cos2 3 2 cos2 cos2 tvtv tvtv tvtv l c c l b b l a a (5) iap 500mv r b rf rf ct neutral phase ip ian cf cf 02676-a-019 where v e 1 pal e e ael voltage channels connection figure 20 shows two typical connections for the voltage channel. the first option uses a potential transformer (pt) to provide complete isolation from the main voltage. in the second option, the ade7752 is biased around the neutral wire, and a resistor divider is used to provide a voltage signal proportional to the line voltage. adjusting the ratio of ra, rb, and vr is also a convenient way of carrying out a gain calibration on the meter. 500mv ra * rb * vr * va p agnd rf rf pt neutral phase vn cf cf va p rf neutral phase vn cf cf * ra >> rf + vr; * rb + vr = rf 02676-a-018 500mv e 2 pal e lae ael a , v b , and v c b represent the voltage rms values of the different phases. the current inputs are represented by equation 6. () ( ) () () ? ? ? ? ? ? ++= ? ? ? ? ? ? ++= += c l c c b l b b a l a a titi titi titi 3 4 cos2 3 2 cos2 cos2 (6) where i a , i b , and i c b represent the rms value of the current of each phase and ? a , ? b b , and ? c represent the phase difference of the current and voltage channel of each phase. the instantaneous powers can then be calculated as follows: p a ( t ) = v a ( t ) i a ( t ) p b ( t ) = v b b ( t ) i b b ( t ) p b c ( t ) = v c ( t ) i c ( t ) then: ( ) () ( ) () () () () ? ? ? ? ? ? ++?= ? ? ? ? ? ? ++?= + ? = c l ccc cc c b l bbb bb b a l aaa aa a tivivtp tivivtp tivivtp 3 8 2cos cos 3 4 2cos cos 2cos cos (7) as shown in equation 7, in the ade7752, the real power calcu- lation per phase is made when current and voltage inputs of one phase are connected to the same channel (a, b, or c). then the summation of each individual real power calculation gives the total real power information, p ( t ) = p a ( t ) + p b ( t ) + p c ( t ). b
ade7752/ade7752a rev. c | page 16 of 24 figure 21 shows the connections of the analog inputs of the ade7752 with the power lines in a 3-phase 3-wire delta service. note that only two current inputs and two voltage inputs of the ade7752 are used in this case. the real power calculated by the ade7752 does not depend on the selected channels. figure 22 shows the connections of the analog inputs of the ade7752 with the power lines in a 3-phase 4-wire wye service. source icp icn load ct ibp ibn antialiasing filters phase a phase b phase c rb* ra* vr* cf vap ct rb* antialiasing filters iap ian ct rb* antialiasing filters rb* ra* vr* cf vcp rf cf vn rb* ra* vr* cf vbp rb* * ra >> rf + vr; * rb + vr = rf 02676-a-022 ct rb* antialiasing filters iap ian source rb* ra* rb* vr* rf cf cf vn ra* vr* cf load phase a phase b phase c ct rb* va p vbp antialiasing filters ibn ibp * ra >> rf + vr * rb + vr = rf 02676-a-021 figure 22. 3-phase 4-wire meter connection with ade7752 figure 21. 3-phase 3-wire meter connection with ade7752
ade7752/ade7752a rev. c | page 17 of 24 power supply monitor the ade7752 contains an on-chip power supply monitor. the power supply (v dd ) is continuously monitored by the ade7752. if the supply is less than 4 v 5%, the outputs of the ade7752 are inactive. this is useful to ensure correct device startup at power-up and power-down. the power supply monitor has built-in hysteresis and filtering. this gives a high degree of immunity to false triggering due to noisy supplies. as can be seen from figure 23 , the trigger level is nominally set at 4 v. the tolerance on this trigger level is about 5%. the power supply and decoupling for the part should be such that the ripple at v dd does not exceed 5 v 5% as specified for normal operation. hpf and offset effects figure 25 shows the effect of offsets on the real power calcula- tion. as can be seen, an offset on the current channel and voltage channel contribute a dc component after multiplication. since this dc component is extracted by the lpf and is used to generate the real power information for each phase, the offsets contribute a constant error to the total real power calculation. this problem is easily avoided by the hpf in the current channels. by removing the offset from at least one channel, no error component can be generated at dc by the multiplication. error terms at cos(t) are removed by the lpf and the digital- to-frequency conversion. see the digital-to-frequency conversion section. () {} () {} () () () t iv tvitiviv iv itivtv os ososos os os 2cos 2 cos cos 2 cos cos + + ++ =+ + the hpfs in the current channels have an associated phase response that is compensated for on-chip. figure 24 and figure 26 show the phase error between channels with the compensation network. the ade7752 is phase compensated up to 1 khz as shown. this ensures correct active harmonic power calculation even at low power factors. v dd 5v 4v 0v internal reset inactive time active inactive 02676-a-023 v os i os i os v v os i dc component (including error term) is extracted by the lpf for real power calculation 2 frequency ? rad/s 2 v i 0 02676-a-024 e 23 p e ppl e 2 ee ael e e eal e alla frequency (hz) 0.07 0.06 ?0.01 0 1000 200 400 600 800 phase (degrees) 0.03 0.02 0.01 0 0.05 0.04 100 300 500 700 900 02676-a-025 frequency (hz) 0.010 0.008 ?0.004 40 70 45 50 phase (degrees) 0.002 0 ?0.002 0.006 0.004 55 60 65 02676-a-026 figure 24. phase error between channels (0 hz to 1 khz) figure 26. phase error between channels (40 hz to 70 hz)
ade7752/ade7752a rev. c | page 18 of 24 digital-to-frequency conversion after multiplication, the digital output of the low-pass filter contains the real power information of each phase. because this lpf is not an ideal brick wall filter implementation, however, the output signal also contains attenuated components at the line frequency and its harmonics (cos(h t), where h = 1, 2, 3, and so on). power signal. the average value of a sinusoidal signal is zero. thus, the frequency generated by the ade7752 is proportional to the average real power. figure 27 shows the digital-to- frequency conversion for steady load conditions, constant voltage, and current. figure 27 as can be seen in the magnitude response of the filter is given by () 2 8 1 1 || ? ? ? ? ? ? + = f fh (8) , the frequency output cf varies over time, even under steady load conditions. this frequency variation is primarily due to the cos(2 t) components in the instantaneous real power signal. the output frequency on cf can be up to 160 times higher than the frequency on f1 and f2. the higher output frequency is generated by accumulating the instantaneous real power signal over a much shorter time, while converting it to a frequency. this shorter accumulation period means less averaging of the cos(2 t) component. as a conse- quence, some of this instantaneous power signal passes through the digital-to-frequency conversion. this is not a problem in the application. where cf is used for calibration purposes, the frequency should be averaged by the frequency counter. this removes any ripple. if cf is being used to measure energy, such as in a microprocessor-based application, the cf output should also be averaged to calculate power. because the outputs f1 and f2 operate at a much lower frequency, much more averaging of the instantaneous real power signal is carried out. the result is a greatly attenuated sinusoidal content and a virtually ripple-free frequency output. where the ?3 db cutoff frequency of the low-pass filter is 8 hz. for a line frequency of 50 hz, this would give an attenuation of the 2 (100 hz) component of approximately C22 db. the dominating harmonic is twice the line frequency, cos(2 t), due to the instantaneous power signal. figure 27 shows the instantaneous real power signal at the output of the cf, which still contains a significant amount of instantaneous power information, cos (2 t). this signal is then passed to the digital-to-frequency converter where it is integrated (accumulated) over time to produce an output frequency. this accumulation of the signal suppresses or averages out any non-dc component in the instantaneous real lpf to extract real power (dc term) multiplier lpf multiplier lpf multiplier lpf digital-to- frequency digital-to- frequency f1 f2 cf va ia vb ib vc ic frequency cf frequency time f1 cos(2 t) attenuated by lpf 2 frequency ? rad/s 2 v i 0 instantaneous real power signal (frequency domain) |x| |x| |x| abs time 02676-a-027 figure 27. real power-to-frequency conversion
ade7752/ade7752a rev. c | page 19 of 24 mode selection of the sum of the three active energies the ade7752 can be configured to execute the arithmetic sum of the three active energies, wh = wh ?a + wh ?b + wh ?c , or the sum of the absolute value of these energies, wh = | wh ?a | + | wh ?b | + |wh ?c |. the selection between the two modes can be made by setting the abs pin. logic high and logic low applied on the abs pin correspond to the arithmetic sum and the sum of absolute values, respectively. when the sum of the absolute values is selected, the active energy from each phase is always counted positive in the total active energy. it is particularly useful in 3-phase 4-wire installa- tion where the sign of the active power should always be the same. if the meter is misconnected to the power lines, (for instance, if ct is connected in the wrong direction), the total active energy recorded without this solution can be reduced by two-thirds. the sum of the absolute values assures that the active energy recorded represents the actual active energy delivered. in this mode, the reverse power pin still detects when negative power is present on any of the three phase inputs. power measurement considerations calculating and displaying power information always has some associated ripple that depends on the integration period used in the mcu to determine average power as well as the load. for example, at light loads, the output frequency may be 10 hz. with an integration period of 2 seconds, only about 20 pulses are counted. the possibility of missing one pulse always exists since the ade7752 output frequency is running asynchro- nously to the mcu timer. this would result in a 1-in-20 or 5% error in the power measurement.
ade7752/ade7752a rev. c | page 20 of 24 transfer function frequency outputs f1 and f2 f 1C7 = 0.60 hz, scf = s0 = s1 = 1 v the ade7752 calculates the product of six voltage signals (on current channel and voltage channel) and then low-pass filters this product to extract real power information. this real power information is then converted to a frequency. the frequency information is output on f1 and f2 in the form of active high pulses. the pulse rate at these outputs is relatively low, such as 29.32 hz maximum for ac signals with scf = 1; s0 = s1 = 1 (see table 6 ). this means that the frequency at these outputs is generated from real power information accumulated over a relatively long period of time. the result is an output frequency that is proportional to the average real power. the averaging of the real power signal is implicit to the digital-to-frequency conversion. the output frequency or pulse rate is related to the input voltage signals by the following equation: ( ) 2 71 181.6 ref ccn bbn aan v fiviviv freq ? ++ = where: freq = the output frequency on f1 and f2 (hz). v an, v bn, and v cn = the differential rms voltage signal on voltage channels (v). i a , i b , and i c = the differential rms voltage signal on current channels (v). v ref = the reference voltage (2.4 v 8%) (v). f 1C7 = one of seven possible frequencies selected by using the logic inputs scf, s0, and s1 (see table 5 ). table 5. f 1C7 frequency selection 1 scf s1 s0 f 1C7 (hz) 0 0 0 1.27 1 0 0 1.19 0 0 1 5.09 1 0 1 4.77 0 1 0 19.07 1 1 0 19.07 0 1 1 76.29 1 1 1 0.60 1 f 1C7 is a fraction of the master clock and therefore varies if the specified clkin frequency is altered. example 1 thus, if full-scale differential dc voltages of +500 mv are applied to va, vb, vc, ia, ib, and ic, respectively (500 mv is the maximum differential voltage that can be connected to current and voltage channels), the expected output frequency is calculated as follows: an = v = v bn cn = ia = ib = ic = 500 mv dc = 0.5 v( rms of dc = dc ) v ref = 2.4 v ( nominal reference value ) note that if the on-chip reference is used, actual output fre- quencies may vary from device to device due to reference tolerance of 8%. hz483.0 4.2 60.05.05.0181.6 3 2 = = freq example 2 in this example, with ac voltages of 500 mv peak applied to the voltage channels and current channels, the expected output frequency is calculated as follows: () value reference nominal v ac icibiavvv ssscf f ref cn bn an v4.2 vrms 2 5.0 peakmv500 110,hz60.0 71 = = = ===== = = = = ? note that if the on-chip reference is used, actual output fre- quencies may vary from device to device due to reference tolerance of 8%. hz24.0 4.222 6.05.05.0181.6 3 2 = = freq as can be seen from these two example calculations, the maximum output frequency for ac inputs is always half of that for dc input signals. the maximum frequency also depends on the number of phases connected to the ade7752. in a 3-phase 3-wire delta service, the maximum output frequency is different from the maximum output frequency in a 3-phase 4-wire wye service. the reason is that there are only two phases connected to the analog inputs, but also that in a delta service, the current channel input and voltage channel input of the same phase are not in phase in normal operation. example 3 in this example, the ade7752 is connected to a 3-phase 3-wire delta service as shown in figure 21 . the total real energy calculation processed in the ade7752 can be expressed as total real powe r = ( v a ? v c ) i a + ( v b ? v c ) i b b b where v a , v b , and v c b represent the voltage on phase a, b, and c, respectively. i a and i b b represent the current on phase a and b, respectively.
ade7752/ade7752a rev. c | page 21 of 24 tabl e 6 shows a complete listing of all maximum output frequencies when using all three channel inputs. as the voltage and current inputs respect equations 5 and 6, the total real power ( p) is ()( )()( ) () () ? ? ? ? ? ? + ? ? ? ? ? ? ? ? ? ? ? ? ? ? +? ? ? ? ? ? ? ++ ? ? ? ? ? ? ? ? ? ? ? ? ? ? +?= ??+? ?= 3 2 cos2 3 4 cos2 3 2 cos2 cos 2 3 4 cos 2 cos2 t i t vvt v ti t vt vp iivviivvp l b l c l b l a l c l a bn bp cb an ap ca table 6. maximum output frequency on f1 and f2 for simplification, assume that ? a = ? b = ? b c = 0 and v a = v b b = v c = v . the preceding equation becomes: () () ? ? ? ? ? ? ++ ? ? ? ? ? ? + ? ? ? ? ? ? + ? ? ? ? ? ? = 3 2 cos sin 3 sin 2 cos 3 2 sin 3 2 sin 2 t?t iv t t ivp l l b l l a (9) p then becomes: ? ? ? ? ? ? ? ? ? ? ? ? ? ? ++ ? ? ? ? ? ? + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ++ ? ? ? ? ? ? = 3 2sin 3 sin 3 2 2sin 3 2 sin t iv t ivp l bbn l aan (10) where v an = v sin(2 /3) and v bn = v sin( /3). as the lpf on each channel eliminates the 2 l component of the equation, the real power measured by the ade7752 is 2 3 2 3 += bbn aan ivivp if full-scale ac voltage of 500 mv peak is applied to the voltage channels and current channels, the expected output frequency is calculated as follows: value reference nominal v4.2 0 2 5.0 500 110,60.0 71 = == = ===== === = ? ref c cn cba bn an v iv rms acpeak iiivv ssscf f v vm hz note that if the on-chip reference is used, actual output fre- quencies may vary from device to device due to reference tolerance of 8%. hz139.0 2 3 4.222 60.05.05.0181.6 2 2 = = freq scf s1 s0 max frequency for ac inputs (hz) max frequency for dc inputs (hz) 1.02 0 0 0 0.51 1 0 0 0.48 0.96 0 0 1 2.04 4.09 1 0 1 1.91 3.84 0 1 0 7.67 15.35 1 1 0 7.67 15.35 0 1 1 30.70 61.4 0.48 1 1 1 0.24 frequency output cf the pulse output calibration frequency (cf) is intended for use during calibration. the output pulse rate on cf can be up to 160 times the pulse rate on f1 and f2. the lower the f 1C7 frequency selected, the higher the cf scaling. table 7 shows how the two frequencies are related, depending on the states of the logic inputs s0, s1, and scf. because of its relatively high pulse rate, the frequency at this logic output is proportional to the instantaneous real power. as with f1 and f2, the frequency is derived from the output of the low-pass filter after multiplica- tion. however, because the output frequency is high, this real power information is accumulated over a much shorter time. thus, less averaging is carried out in the digital-to-frequency conversion. with much less averaging of the real power signal, the cf output is much more responsive to power fluctuations. see figure 15 . table 7. maximum output frequency on cf scf s1 s0 f 1C7 (hz) cf max for ac signals (hz) 0 0 0 1.27 160 f1, f2 = 81.87 1 0 0 1.19 8 f1, f2 = 3.83 0 0 1 5.09 160 f1, f2 = 327.46 1 0 1 4.77 16 f1, f2 = 30.70 0 1 0 19.07 16 f1, f2 = 122.81 1 1 0 19.07 8 f1, f2 = 61.40 0 1 1 76.29 8 f1, f2 = 245.61 1 1 1 0.60 16 f1, f2 = 3.84
ade7752/ade7752a rev. c | page 22 of 24 selecting a frequency for an energy meter application as shown in tabl e 5 , the user can select one of seven frequen- cies. this frequency selection determines the maximum frequency on f1 and f2. these outputs are intended to be used to drive the energy register (electromechanical or other). since only seven different output frequencies can be selected, the available frequency selection has been optimized for a 3- phase 4-wire service with a meter constant of 100 imp/kwhr and a maximum current between 10 a and 100 a. table 8 shows the output frequency for several maximum currents (i max ) with a line voltage of 220 v (phase neutral). in all cases, the meter constant is 100 imp/kwhr. table 8. v. f1 and f2 frequency at 100 imp/kwhr i max (a) f1 and f2 (hz) 10 0.18 25 0.46 40 0.73 60 1.10 80 1.47 100 1.83 the f 1C7 frequencies allow complete coverage of this range of output frequencies on f1 and f2. when designing an energy meter, the nominal design voltage on the voltage channels should be set to half scale to allow for calibration of the meter constant. the current channel should also be no more than half scale when the meter sees maximum load. this allows overcurrent signals and signals with high crest factors to be accommodated. tabl e 9 shows the output frequency on f1 and f2 when all six analog inputs are half scale. table 9. f1 and f2 frequency with half-scale ac inputs scf s1 s0 f 1C7 frequency on f1 and f2 (half-scale ac inputs) 0 0 0 1.27 0.26 1 0 0 1.19 0.24 0 0 1 5.09 1.02 1 0 1 4.77 0.96 0 1 0 19.07 3.84 1 1 0 19.07 3.84 0 1 1 76.29 15.35 1 1 1 0.60 0.12 when selecting a suitable f 1C7 frequency for a meter design, the frequency output at i max (maximum load) with a 100 imp/kwhr meter constant should be compared with column 5 of tabl e 9 . the frequency closest to that listed in tabl e 9 is the best choice of frequency (f 1C7 ). for example, if a 3-phase 4-wire wye meter with a 25 a maximum current is being designed, the output frequency on f1 and f2 with a 100 imp/kwhr meter constant is 0.15 hz at 25 a and 220 v (from tabl e 8 ). looking at tabl e 9 , the closest frequency to 0.15 hz in column 5 is 0.12 hz. therefore, f 1C7 = 0.6 hz is selected for this design. frequency outputs figure 2 shows a timing diagram for the various frequency outputs. the outputs f1 and f2 are the low frequency outputs that can be used to directly drive a stepper motor or electro- mechanical impulse counter. the f1 and f2 outputs provide two alternating high going pulses. the pulse width (t 1 ) is set at 275 ms, and the time between the rising edges of f1 and f2 (t 3 ) is approximately half the period of f1 (t 2 ). if, however, the period of f1 and f2 falls below 550 ms (1.81 hz), the pulse width of f1 and f2 is set to half of their period. the maximum output frequencies for f1 and f2 are shown in tabl e 6 . the high frequency cf output is intended to be used for communications and calibration purposes. cf produces a 96 ms-wide active high pulse (t 4 ) at a frequency proportional to active power. the cf output frequencies are given in tabl e 7 . as in the case of f1 and f2, if the period of cf (t 5 ) falls below 192 ms, the cf pulse width is set to half the period. for example, if the cf frequency is 20 hz, the cf pulse width is 25 ms. one exception to this is when the mode is s0 = 1, scf = s1 = 0. in this case, the cf pulse width is 66% of the period. no load threshold the ade7752 also includes no load threshold and start-up cur- rent features that eliminate any creep effects in the meter. the ade7752 is designed to issue a minimum output frequency. any load generating a frequency lower than this minimum fre- quency does not cause a pulse to be issued on f1, f2, or cf. the minimum output frequency is given as 0.005% of the full-scale output frequency for each of the f 1C7 frequency selections or approximately 0.00204% of the f 1C7 frequency (see tabl e 10 ). for example, for an energy meter with a 100 imp/kwhr meter constant using f 1C7 (4.77 hz), the minimum output frequency at f1 or f2 would be 9.59 10 C5 hz. this would be 1. 54 10 C3 hz at cf (16 f1 hz). in this example, the no load threshold would be equivalent to 3.45 w of load or a start-up current of 15.70 ma at 240 v. table 10. cf, f1, and f2 minimum frequency at no load threshold scf s1 s0 f1, f2 min (hz) cf min (hz) 0 0 0 2.56 x 10 ?05 4.09 x 10 ?03 1 0 0 2.40 x 10 ?05 1.92 x 10 ?04 0 0 1 1.02 x 10 ?04 1.64 x 10 ?02 1 0 1 9.59 x 10 ?05 1.54 x 10 ?03 0 1 0 3.84 x 10 ?04 6.14 x 10 ?03 1 1 0 3.84 x 10 ?04 3.07 x 10 ?03 0 1 1 1.54 x 10 ?03 1.23 x 10 ?02 1 1 1 1.20 x 10 ?05 1.92 x 10 ?04
ade7752/ade7752a rev. c | page 23 of 24 negative power information the ade7752 detects when the current and voltage channels of any of the three phase inputs have a phase difference greater than 90: ? a or ? b or ? b c > 90. this mechanism can detect wrong connection of the meter or generation of active energy. the revp pin output goes active high when negative power is detected on any of the three phase inputs. if positive active energy is detected on all the three phases, revp pin output is low. the revp pin output changes state at the same time a pulse is issued on cf. if several phases measure negative power, the revp pin output stays high until all the phases measure positive power. if a phase has gone below the no load threshold, revp detection on this phase is disabled. revp detection on this phase resumes when the power returns out of no load condition. see the no load threshold section.
ade7752/ade7752a rev. c | page 24 of 24 outline dimensions compliant to jedec standards ms-013-ad 8 0 0.75 (0.0295) 0.25 (0.0098) 45 1.27 (0.0500) 0.40 (0.0157) 0.33 (0.0130) 0.20 (0.0079) seating plane 0.30 (0.0118) 0.10 (0.0039) 0.51 (0.020) 0.31 (0.012) 2.65 (0.1043) 2.35 (0.0925) 1.27 (0.0500) bsc 24 13 12 1 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 15.60 (0.6142) 15.20 (0.5984) coplanarit y 0.10 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design figure 28. 24-lead standard small outline package [soic] wide body (rw-24 ) dimensions shown in millimeters and (inches) ordering guide model temperature range package description package option ade7752ar -40c to + 85c 24- lead soic package rw-24 in tubes ade7752arrl -40c to + 85c 24- lead soic package rw-24 on 13" reels ade7752arz -40c to + 85c 24- lead soic package rw-24 in tubes 1 ade7752arz-rl -40c to + 85c 24- lead soic package rw-24 on 13" reels 1 ade7752aar -40c to + 85c 24- lead soic package rw-24 in tubes ade7752aar-rl -40c to + 85c 24- lead soic package rw-24 on 13" reels ade7752aarz -40c to + 85c 24- lead soic package rw-24 in tubes 1 ade7752aarz-rl -40c to + 85c 24- lead soic package rw-24 on 13" reels 1 eval-ade7752eb evaluation board EVAL-ADE7752AEB evaluation board 1 z = pb-free part. ? 2005 analog devices, inc. all rights reserved. trademarks and registered trademarks are the proper ty of their respective companies. c02676-0-7/05(c)

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